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M62343GP
8-Bit, 3-Channel D/A Converter (Buffered)
REJ03F0075-0200 Rev.2.00 Jun 15, 2007
Description
The M62343GP is a CMOS-structure semiconductor integrated circuit incorporating three 8-bit D/A converter channels with output buffer op-amps. Serial data transfer type input can easily be used through a combination of three lines: DI, CLK, and LD. Outputs incorporate buffer op-amps that have a drive capacity of 1 mA or above for both sink and source, and can operate over the entire voltage range from almost ground to VCC (0 to 5 V), making peripheral elements unnecessary and enabling configuration of a system with few component parts. This product is currently under development, and specifications and other details may be modified at a future date.
Features
* Data transfer format 10-bit serial data input type * Output buffer op-amps Operable over entire voltage range from almost ground to VCC (0 to 5 V) * High output current capacity 1 mA or higher
Application
Signal gain setting and automatic adjustment in DSC, CTV, and display monitors, conversion from digital data to analog data in consumer and industrial products
Block Diagram
VCC 4 LD 8 CLK 7 DI 6 GND 5
10-bit shift register
Power-on reset
8
Channel decoder
8-bit latch
8-bit latch
8-bit latch
8-bit upper segment R-2R
8-bit upper segment R-2R
8-bit upper segment R-2R
+-
+-
+-
1 AO1
2 AO2
3 AO3
REJ03F0075-0200 Rev.2.00 Jun 15, 2007 Page 1 of 7
M62343GP
Pin Arrangement
M62343GP AO1 AO2 AO3 VCC 1 2 3 4 (Top view) Outline: PTSP0008JB-B (TTP-8DV) (recommend) PTSP0008JA-A (8P2J-A) (discontinued PKG) 8 7 6 5 LD CLK DI GND
Pin Description
Pin No. 6 7 8 1 2 3 4 5 DI CLK LD AO1 AO2 AO3 VCC GND Symbol Function Serial data input pin. Inputs serial data with a 10-bit data length. Serial clock input pin. Input signal from DI pin is input to 10-bit shift register at rise of shift clock. Load pin. When "H" level is input to LD pin, value in 10-bit shift register is loaded into decoder and D/A output register. 8-bit resolution D/A converter output pins (After power-on, all channels are reset and DAC data 00h is output.) Power supply voltage pin GND pin
REJ03F0075-0200 Rev.2.00 Jun 15, 2007 Page 2 of 7
M62343GP
Absolute Maximum Ratings
Item Power supply voltage Input voltage Output voltage Internal power consumption Operating ambient temperature Storage temperature VCC Vin VO Pd Topr Tstg Symbol Rated Value -0.3 to 7.0 -0.3 to VCC+0.3 7.0 -0.3 to VCC+0.3 7.0 200 -20 to +85 -55 to +125 Unit V V V mW C C
Electrical Characteristics
(Unless specified otherwise, VCC = +5 V 10%, GND = 0 V, Ta = -20C to 85C)
Specification Values Item Power supply voltage Power supply current Symbol VCC ICC Min 2.7 0 0 Input leakage current Input voltage "L" Input voltage "H" Buffer amp output voltage range Buffer amp output drive range Differential nonlinearity error Nonlinearity error Zero point error Full-scale error Oscillation limit output capacitance Buffer amp output impedance IILK VIL VIH VAO IAO SDL SL SZERO SFULL CO RO -10 0 0.5Vcc 0.1 0.1 -1.0 -1.0 -1.5 -2.0 -2.0 -- -- Typ 5.0 0.8 0.6 -- -- -- -- -- -- -- -- -- -- 5.0 Max 5.5 2.7 1.8 10 0.2Vcc Vcc Vcc-0.1 Vcc-0.2 1.0 1.0 1.5 2.0 2.0 0.1 -- A V V V mA LSB LSB LSB LSB F Unit V mA At CLK = 1 MHz operation, IAO = 0 A D/A data: 6 Ah (at maximum current) DI = CLK = LD = GND, IAO = 0 A VIN = 0 to VCC Test Conditions
IAO = 100 A IAO = 500 A Upper saturation voltage = 0.3 V Lower saturation voltage = 0.2 V VCC = 5.12 V (20 mV/LSB) No load (IAO = 0)
AC Characteristics
(Unless specified otherwise, VCC = +5 V 10%, GND = 0 V, Ta = -20C to 85C)
Item Clock "L" pulse width Clock "H" pulse width Clock rise time Clock fall time Data setup time Data hold time Load setup time Load hold time Load "H" pulse width D-A output settling time Symbol tCKL tCKH tCR tCF tDCH tCHD tCHL tLDC tLDH tLDD Specification Values Min Typ Max 200 200 -- -- 30 60 200 100 100 -- -- -- -- -- -- -- -- -- -- -- -- -- 200 200 -- -- -- -- -- 300 Unit ns ns ns ns ns ns ns ns ns s Until output reaches last 1/2 LSB Test Conditions
REJ03F0075-0200 Rev.2.00 Jun 15, 2007 Page 3 of 7
M62343GP
Timing Chart
tCR tCKH tCF
CLK tCKL tLDC DI tDCH tCHD tLDH tCHL
LD
tLDD
D/A output
REJ03F0075-0200 Rev.2.00 Jun 15, 2007 Page 4 of 7
M62343GP
Digital Data Format
Last LSB D0 D1 D2 D3 D4 D5 D6 D7 D8 First MSB D9
For D/A output
for channel address
D/A Data
D0 0 1 0 1 D1 0 0 1 1 D2 0 0 0 0 D3 0 0 0 0 D4 0 0 0 0 D5 0 0 0 0 D6 0 0 0 0 D7 0 0 0 0 D-A output VCC/256x1 VCC/256x2 VCC/256x3 VCC/256x4

0 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
VCC/256x255 VCC/256x256
Channel Select Data
D8 0 1 0 1 D9 0 0 1 1 Channel Selection AO1 selected AO2 selected AO3 selected Don't care
Data Timing Chart (Model)
DI D9 D8 D7 D6
.....
D3
D2
D1
D0
CLK
.....
LD
D/A output
REJ03F0075-0200 Rev.2.00 Jun 15, 2007 Page 5 of 7
M62343GP
Usage Notes
1. With this IC, D/A converter upper reference voltage setting is performed by means of the power supply voltage. If ripples or spikes are imposed on this pin, conversion accuracy may fall. When using this IC, a capacitor must be inserted between the power supply pin and GND in order to ensure stable D/A conversion. 2. The output buffer amps of this IC are highly tolerant of capacitive loads. Therefore, connecting capacitors (0.1 F max.) between the output pins and ground in order to eliminate jitter or noise due to output line wiring presents no problems whatever in terms of operation.
Sample Standard Application Circuit
1 AO1 LD 8
Analog voltage output pins
2
AO2
CLK 7 DI 6
MCU
3
AO3
5V
4 + 10 F
VCC
GND 5
REJ03F0075-0200 Rev.2.00 Jun 15, 2007 Page 6 of 7
M62343GP
Package Dimensions
Package Name TSSOP-8 JEITA Package Code P-TSSOP8-4.4 x 3-0.65 RENESAS Code PTSP0008JB-B Previous Code TTP-8DV MASS[Typ.] 0.034g
*1 D
8
5
bp
*2 E HE
Index mark
F
1
Z
4
*3 bp
Terminal cross section NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
xM
(Ni/Pd/Au plating)
e
c
Reference Symbol
Dimension in Millimeters
Min
L1
L
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Nom Max 3.00 3.30 4.40
A
0.03 0.07 0.10 1.10 0.15 0.20 0.25 0.10 0.15 0.20
A1
y
Detail F
0 8 6.20 6.40 6.60 0.65 0.13 0.10 0.805 0.40 0.50 0.60 1.0
Package Name TSSOP-8
JEITA Package Code P-TSSOP8-4.4x3-0.65
RENESAS Code PTSP0008JA-A
Previous Code 8P2J-A
MASS[Typ.] 0.04g
8
5
*1
HE
E
F
A2 1 4 Index mark
A1
NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
c
*2 D
Reference Symbol
Dimension in Millimeters
e
y *3 bp
x
Detail F
D E A2 A A1 bp c HE e x y L
Nom Max 3.0 3.1 4.4 4.5 1.0 1.2 0.1 0.2 0 0.2 0.25 0.32 0.14 0.15 0.2 0 8 6.2 6.4 6.6 0.65 0.13 0.10 0.3 0.5 0.7
Min 2.9 4.3
A
REJ03F0075-0200 Rev.2.00 Jun 15, 2007 Page 7 of 7
L
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